Sarge's Invincible Consulting

Verification

As one of Sarge’s students once said, “Find bugs is more difficult than writing bugs.”  Even though English was his second language, his point is well made.  Verification is one of the most difficult problems on any ASIC today.  With protocol/design specs thicker than a Harry Potter novel, the verification task has become enormous.  

Sarge was introduced to the coverage driven approach to verification in 2000, and has advocated that methodology ever since.  It is the only way to get a handle on the complexity of today’s designs.

Sarge works in parallel with the RTL design to get a behavioral model running, which allows the verification team to work at creating tests while the RTL is being developed.  This way, tests can be run the very same day the RTL is complete.

Sarge has worked with all the major HVLs in production today, and while SystemVerilog and UVM have come to dominate the industry, he still considers Specman the best verification language available. As of late, he’s also been trained in the Perspec tool from Cadence, which implements the Portable Stimulus Standard (PSS). Use of this tool can push your verification to the next level.